1. IBM’s latest sub-1 nm transistor technology deals with layers that are only a handful of atoms thick. Smaller transistors usually mean better performance and greater power efficiency. In this case, ...

Sub-1 nm chip tech stacks transistors vertically, letting more compute fit in less space while improving speed and efficiency. The achievement marks a landmark moment for an industry facing the ...

ALBANY — IBM announced it made a major breakthrough in computer chipmaking at Albany NanoTech, producing chips with sub-1-nanometer architecture, the smallest features ever made on a chip. The chips ...

IBM has unveiled what it says is the world's first sub-1 nanometer (nm) chip technology, introducing a new transistor architecture that the company believes could extend semiconductor scaling for at ...

First look: IBM is once again testing the limits of chip design, this time with an architecture that moves beyond traditional scaling into a more three-dimensional layout aimed at AI workloads. The ...

Use left and right arrow keys to seek audio. IBM has announced what it calls the world's first sub-1 nanometer chip technology, unveiling a new 0.7nm process built around an entirely new transistor ...

IBM on Thursday unveiled what it said was the world's first technology capable of producing chips smaller than one nanometer, as tech companies race to build semiconductors that can handle ...

It's the world’s first sub-1 nm chip technology, IBM claims. The fingernail-size chip is built with IBM's new transistor architecture, called nanostack, which vertically stacks and staggers ...

IBM today announced what it calls the world's first sub-1 nanometer chip technology, unveiling a new 0.7nm (7 angstrom) semiconductor process built around an entirely new transistor architecture ...

In a major breakthrough, IBM revealed the world’s first semiconductor chip technology built on a sub-1 nanometer chipmaking process. For comparison, the process uses transistor features smaller than ...

IBM is showing of a sub-nm architecture, having created a 3D “nanostack” design at the 0.7nm node. The technology builds vertical towers of transistors, staggering their placement, to increase density ...

A person holds up a printed circuit board with a quantum processing unit at the IBM Thomas J. Watson Research Center on June 6, 2025 in Yorktown Heights, New York. Technology veteran IBM on June 10 ...