J-LINK REDUCES JTAG DEBUG PINCOUNT FROM 5 to 1! Pittsford, New York—Traditional JTAG boundary-scan testing normally takes up 5 valuable pins on an i.c., requires 5 resistors, and increases chip power.

[Surya Chilukuri] writes in to share JTAGprobe — a fork of the official Raspberry Pi debugprobe firmware that lets you use the low-cost microcontroller development board for JTAG and SWD debugging ...

This debugger was implemented and designed for the ATmega644 which utilizes its JTAG interface for communication as it sets breakpoints and access registers and memory in order to control program ...

Designed for JTAG and background debug mode (BDM) debugging, the usbDemon USB device features an application programming interface that is fully compatible with industry-standard software debuggers, ...

JTAG debuggers tend to be large, fast, and expensive, or cheap and slow. The new crop of USB-based JTAG debuggers is cutting the cost while keeping the performance high. I recently had a chance to ...

Developers that use any ARM-based platform would like a helping hand debug issues may be interested to know that the Segger J-Link EDU Mini, JTAG/SWD Debugger is now available to purchase directly ...

Electronic enthusiasts and Raspberry Pi users may be interested in a new JTAG debugger board called Tap-Hat which has been created by the team at eCosCentric. The TAP-HAT has been designed to provide ...

As designs continue to grow in size and complexity, that complexity has led to an increasing number of processing cores. Additional cores, in turn, allow for additional software to be run on those ...

When projects move away from discrete development of loosely coupled systems to an integrated heterogeneous environment, elephantine debugging challenges are created. These challenges do not exist ...